Multi-GHz radio communication networks, as for instance 60 GHz radio communication networks, are well suited for transmission of data at multi-Gigabits per second over limited distances.
Such multi-GHz radio communications are subject to shadowing and fading. For example, a physical obstacle in the wireless data transmission path from a source device to a receiving device may generate interferences that impact the communications. This may result in unrecoverable errors in the signal received by the destination device.
In order to overcome the effects of shadowing and fading, the respective antenna of the source and destination devices may be placed at locations at which the risk of occurrence of shadowing and fading is reduced. For instance, the devices may be placed above a given height in a room in which users are supposed to move (user may constitute moving obstacles).
Another way to overcome the effects of shadowing and fading may be to add diversity in the signals exchanged. Diversity may be obtained by using a plurality of antennas for transmitting and/or receiving the signals and separate these antennas by a minimum predefined distance. This may ensure different transmission conditions from the source device to the destination device.
In some multi-GHz (e.g. 60 GHz) radio communication devices, the RF (radio frequency) antennas are directly integrated on top of the radiofrequency (RF) chip which forms the PHY layer module (or PHY module).
According to some radio communication standards, such as the ECMA-369 standard specification, the MAC layer in a transmitting device and the PHY layer in a receiving device communicate through a parallel connection, also referred to as the MAC-PHY connection. Such a MAC-PHY connection is represented in FIG. 1.
FIG. 1 represents a parallel connection 100 between a MAC layer 101 and a PHY layer 102, comprising three different sub-connections:                a control data sub-connection 103;        an application data sub-connection 104; and        a management data sub-connection 105.        
The control data sub-connection 103 is used by the MAC layer 101 for initiating a transmission of a MAC frame over the network to the PHY layer 102. In order to initiate the transmission of the MAC frame, the MAC layer 101 uses a signal TX_START. The control data sub-connection 103 is also used by the PHY layer 102 for indicating that a MAC frame has been received from the network. In order to indicate that the MAC frame has been received, the PHY layer 102 uses a signal RX_START.
The management data sub-connection 105 is used by the MAC layer 101 and the PHY layer 102 for exchanging information relating to the setting up of the communication, such as information regarding the MAC frame structure.
The management data are a sub-class of the control data, with dedicated interfaces and a sub-connection.
The MAC layer 101 provides the PHY layer 102 with management data by activating a signal MGT_W which indicates that signals MGT_ADDW and MGT_DATAW are valid.
Signal MGT_DATAW carries the management data and signal MGT_ADDW represents the concerned register address.
When the signal MGT_W is valid, PHY layer 102 obtains the management data via the MGT_DATAW signal and the register address at which the management data shall be written, via signal MGT_ADDW.
For instance, the management data sub-connection 105 allows the MAC layer 101 to define the structure of a following MAC frame. The MAC frame has a plurality of data segments (maximum N), one register DSi (i=1 to N) being provided per such data segment according to its position in the MAC frame. Each register DSi may contain the respective data segment length Li and code rate CRi to be applied, as well as an identification of the coding scheme CSi to be applied.
The PHY layer 102 provides the MAC layer 101 with management data (such as triggering events, interruptions or exceptions) by activating the signal MGT_R which indicates that the signals MGT_ADDR and MGT_DATAR are valid. The management data are provided via the signals MGT_DATAR and the concerned register address via the signals MGT_ADDR.
When the signal MGT_R is valid, the MAC layer 101 obtains the management data via the signals MGT_DATAR and the register address at which said management data shall be written, via the signals MGT_ADDR.
The application data sub-connection 104 is used for exchanging the data payload of MAC frames. The application data sub-connection 104 uses a handshaking procedure, based on the signals DATA_TX_RQ and DATA_TX_EN for transmitting a MAC frame and based on the signals DATA_RX_RQ and DATA_RX_EN for receiving a MAC frame.
The signal DATA_TX_RQ is a flow control signal indicating that the PHY layer 102 requests application data from the MAC layer 101. In response, the MAC layer 101 activates the signal DATA_TX_EN (indicating that the signals DATA_TX are valid) and provides application data via the signals DATA_TX. When the signal DATA_TX_EN is valid, the MAC layer 101 obtains said application data via the signals DATA_TX.
The signal DATA_RX_RQ is a flow control signal indicating that the MAC layer 101 requests application data from the PHY layer 102. In response, the PHY layer 102 activates the signal DATA_RX_EN (indicating that the signals DATA_RX are valid) and provides application data via the signals DATA_RX. When the signal DATA_RX_EN is valid, the MAC layer 101 obtains said application data via the signals DATA_RX.
The data exchanges, either to transmit a MAC frame or to receive a MAC frame, are scheduled according to a clock signal DATA_CLK provided by the PHY layer 102 to the MAC layer 101.
It can be understood, from the brief description above, that such a parallel connection uses a handshake-based communication protocol, i.e. a communication protocol involving feedback.
The number of pins required to implement such a MAC-PHY connection increases with the data rate to be supported. Therefore, it lacks flexibility to face the aforementioned shadowing and fading phenomena. Indeed, it requires either to place the whole communication devices in an appropriate location (for instance, above a given height, as already mentioned) or to implement a complex and costly long-distance parallel connection (due to the high number of pins to support).
The Serial Gigabit Media Independent Interface (SGMII) specification has been proposed in order to convey network data and information about port speed (selected from 10/100/1000 Mbps) between a 10/100/1000 Mbps PHY layer and an Ethernet MAC layer with a reduced number of signal pins than required for conventional MAC-PHY connections. SGMII uses two data signals and two clock signals to convey frame data and link rate information between the 10/100/1000 Mbps PHY layer and the Ethernet MAC layer.
Even though the SGMII specification simplifies the electrical layout by reducing the number of necessary pins, the specified interface does not provide a sufficiently low communication latency of the MAC-PHY connection to efficiently allow multi-Gigabits per second data rates. Indeed, according to the SGMII specification, a handshake-based communication protocol is implemented between the MAC layer and the PHY layer, as well as a negotiation about the data rate, at the setting up of the connection.
However, according to some wireless standards, like IEEE 802.15.3c for instance, the data rate may change from frame to frame and also during a single frame. For example, the data rate may change up to 8 times during a single MAC frame. Handshaking is not compatible with the low latency requirement of multi-Gigabits per second communications in between distant communication devices.
A similar issue exists when the MAC layer and the PHY layer are on a single PCB (Printed Circuit Board). Indeed, the high number of pins required to implement the MAC-PHY interface implies high routing cost if the chips respectively embedding the MAC layer and the PHY layer have to be placed at specific locations on the board, due to design constraints.
In this context, document EP 2 398 205 discloses using adapters in order to emulate the parallel connection while using an asynchronous serial link.
The present inventors have found that improvements may be provided concerning the use of an asynchronous serial link between MAC and PHY modules, especially when performing time sensitive transactions between these modules.
“Time sensitive transactions” may refer to transactions involving actions which shall be completed in a predetermined time and/or actions which shall be triggered by the occurrence of an event within a predetermined time. Such transactions require low latency.
For instance, if the MAC layer defines that the PHY layer has to start an action when a particular event occurs at the PHY layer. Using adapters emulating a parallel connection on an asynchronous serial link may introduce latency. For example, latency may be introduced if a feedback to the MAC layer through the serial link is required when the event occurs and if the action requested has to be transmitted from the MAC layer to the PHY layer through the serial link again.
FIG. 2 is an illustration of the latency discussed above.
When an event which shall trigger an action occurs at time T0, the MAC layer is informed through the serial link. Transmission C1 of the information takes some time, and the MAC layer is informed at time T1. Then, at time T2, the MAC layer outputs an order message (or control message) to perform the action. The transmission C2 of the order through the serial link takes some time and the order is received by the PHY layer at time T3.
In systems which don't use a serial link between the MAC and PHY layers, transmissions C1 and C2 are quite instantaneous and then the overall latency from T0 to T3 is almost limited to the MAC layer's latency (between T1 and T2).
However, when using a serial link, the overall latency is much greater and it might be critical when transactions timing shall be compliant with physical constraint, like the duration of a signal.
Document US 2011/0125944 discloses a method of synchronizing transactions between an initiator and recipients, wherein the initiator informs the recipients it wants to apply a synchronous command, the recipients generate a barrier by a barrier generator, and as long as the barrier conditions are not fulfilled, the initiator blocks its synchronous commands.
When all requested conditions are fulfilled, the barrier generator informs the initiator that the system is ready for the synchronous command. Next, the initiator can send its synchronous command.
This method necessitates interactions between the initiator and the recipients. Also, recipients must know the algorithm for generating and managing the appropriate barrier. This may not be desirable.